Google Researcher Reveals Design Philosophy of MorphoHDL, an HDL that Generates Circuits via Recursive Cell Splitting

MorphoHDL functions as a graph rewriting system. Nodes are functional cells with input and output ports, and edges are buses carrying variable-length wires. Cells are independent of size, supporting arbitrary widths through the recursive splitting and merging of buses.

This approach can be viewed as a practical implementation of parametric L-systems. A hierarchical cell lineage generates general graphs while inheriting lateral connections. At present, it is limited to feed-forward (combinational) circuits.

In conventional HDLs, designers must manually describe hierarchical boundaries. Furthermore, existing chip implementation processes follow a waterfall model, where logic synthesis and physical placement are decoupled. This leads to timing closure loops caused by wiring delays and congestion.

MorphoHDL is motivated, in part, by the search for a solution to this timing closure problem. It aims to grow physical geometric structures and logical structures simultaneously. In the future, the author envisions circuits similar to "digital organisms," where physical proximity determines logical connectivity.

Mordvintsev stated that MorphoHDL is currently a conceptual sketch and not a complete system for production environments. He noted that the syntax and functionality may change in future iterations.